1. Field of the Invention
The present invention relates to a multilayer ceramic electronic component, and in particular relates to a multilayer ceramic electronic component having a structure suitable for decreasing the thickness of ceramic layers and increasing the number of ceramic layers.
2. Description of the Related Art
In recent years, small portable electronic apparatuses, such as a cellular phone, a notebook personal computer, a digital camera, and a digital audio apparatus, have been increasingly in demand. Miniaturization of these portable electronic apparatuses is progressing, and at the same time, improvement in performance thereof is also progressing. Since many multilayer ceramic electronic components are mounted in these portable electronic apparatuses, improvement in performance is also required for the multilayer ceramic electronic components, and for example, an increase in capacity is required for multilayer ceramic capacitors. In response to this requirement, in the multilayer ceramic capacitor, a decrease in thickness of a ceramic layer has been carried out, and as a result, the number of ceramic layers to be laminated tends to be increased.
In general, a multilayer ceramic electronic component is manufactured in such a way that after internal electrode patterns are printed on ceramic green sheets to be formed into ceramic layers after firing, the ceramic green sheets are laminated to each other so as to shift the internal electrode patterns in a predetermined direction to form a mother block, and this mother block is cut into green chips each having a predetermined dimension.
In this manufacturing method, in order to prevent the internal electrode patterns from being exposed to side surfaces of the green chip caused by misalignment generated in a laminating and/or a cutting step, a margin of each side gap region between the side surface of the green chip and the side of the internal electrode pattern must be ensured. However, when miniaturization of the multilayer ceramic electronic component is performed, the ratio of the area of the side gap region to the area of the internal electrode is increased, and as a result, the capacity of the multilayer ceramic capacitor is inevitably decreased in an amount corresponding to the above increase in ratio.
In order to solve the above problem, Japanese Unexamined Patent Application Publication No. 6-349669 has disclosed that after a laminate is prepared in which two side ends of internal electrodes are exposed to side surfaces of the laminate, since ceramic green sheets are adhered to these side surfaces thereof to form side gap regions, miniaturization of a multilayer capacitor and an increase in capacity thereof can be achieved.
However, according to the technique disclosed in Japanese Unexamined Patent Application Publication No. 6-349669, in the laminate before the ceramic green sheets are adhered thereto, since no side gap regions are present, the number of areas at which ceramic layers are adhered to each other in the lamination direction is decreased, and as a result, delamination is liable to occur. In addition, the present inventors discovered that delamination is liable to occur particularly at a corner of an extending portion of an internal electrode (which is exposed to a corner portion of a green chip after cutting) in the vicinity of each of external layers (upper and lower ceramic layers on which the internal electrodes are not formed).
The reason for this is estimated that a stress is liable to be concentrated when a mother block is cut to have a predetermined dimension, and a corner portion having a small adhesion area is liable to function as a starting point of delamination.
In addition, a problem similar to that described above may occur not only in multilayer ceramic capacitors but also in multilayer ceramic electronic components other than the multilayer ceramic capacitors.